Typically, integrated circuits comprise a combination of N-type Metal Oxide Semiconductor (NMOS) and P-type Metal Oxide Semiconductor (PMOS) transistors formed on a substrate. The performance of an integrated circuit is directly related to the performance of transistors which it comprises. Therefore, it is desirable to improve the driving current of a transistor so as to enhance the performance thereof.
U.S. patent application Ser. No. 2010/0038685A1 discloses a transistor in which dislocations are formed between the channel region and the source/drain region. The dislocations may cause tensile stress, which may improve the electron mobility in the channel and thus increase the driving current in the transistor. FIGS. 12a-c in the present application show the formation of such dislocations. In FIG. 12a, silicon is implanted into a semiconductor substrate 1 on which a gate dielectric layer 2 and a gate 3 have been formed so as to form amorphous regions as indicated by the shaded portions in the figure. Then the semiconductor substrate 1 is annealed so as to re-crystallize the amorphous regions. As indicated by the arrows in FIG. 12b, the crystal growth front in the horizontal direction and the crystal growth front in the vertical direction meet during the process of the re-crystallization. As a result, dislocations are formed as shown in FIG. 12c. 
However, if a dislocation is formed in the drain region, junction leakage will increase due to the voltage difference between the drain and the substrate.